Photolithography is used to transfer specific patterns onto semiconductor devices or integrated circuits during the fabrication process. A masking step transfers the pattern of a photomask onto a photoresist layer on the device surface by exposing the photoresist through the mask. Selected areas of the photoresist, based on the pattern of the mask, are then etched so that subsequent process steps, such as impurity introduction, oxidation, and metallization, can be performed. A semiconductor device with the desired electrical properties is then obtained after several of these application-specific masking and processing steps.
For example, a custom or application specific-integrated circuit (ASIC), frequently used to implement new circuit designs, may require several different custom masks during the fabrication process since each layer of the device needs to be specifically patterned. Because precision custom masks are costly to manufacture, a large quantity of each integrated circuit (IC) type must be produced in order for the fabrication process to be economical. However, as technology advances, circuit designs become more application-specific and are typically required at a much lower volume than the more generic ICs, thus making fabrication of such application-specific ICs more expensive per unit.
In an attempt to reduce the costs per unit of ASICs, a current practice is to use gate arrays to customize integrated circuits in order to minimize the number of different custom configuration mask steps. Gate arrays are mass-produced integrated circuits containing generic arrays of circuit elements ("gate array blanks"), which can be customized into application-specific ICs with a small number of masks defining custom interconnections of the circuit elements at the final steps of fabrication. The gate array blanks can be manufactured up to the customization steps and stored away until an order for a particular application-specific circuit is received. A precision configuration mask is then used to customize the specific gate arrays. However, the high costs of precision configuration masks limit the extent that costs and lead-time of ASICs manufacturing can be reduced.
An alternative method is to use direct write-on-wafer technology on gate array processing to replace the steps requiring custom configuration masks. However, using programmable direct-write machines can still incur substantial costs to the manufacture of prototype and production ASICs. Electron beam (E-beam) direct-write technology employs high-cost equipment with a low throughput. On the other hand, laser-based direct-write systems do not have the resolution needed to meet the performance and total die size requirements of present designs. Even though less expensive than E-beam systems, laser based systems are still more expensive and of lower precision than standard optical reduction steppers or other comparable methods using a standard set of precision photomasks.
Accordingly, it is desirable to pattern photoresist so that fabricating customized integrated circuits can be accomplished without the drawbacks of conventional methods in order to reduce both lead-time and costs of designing and manufacturing ASICs.